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DesignCon 2015

Date: Jan. 28-29, 2015.
Location: Santa Clara.

Xpeedic Technology, Inc. will exhibit at DesignCon 2015 at Santa Clara on Jan. 28-29, 2015.

Xpeedic will showcase their high speed signal integrity (SI) solution and RF front end miniaturization solution in the conference. Their fast and accurate SI software enables the quick way to simulate the high speed channel for both pre-layout and post-layout scenarios. Their IP on silicon integrated passive devices (IPD) delivers the industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications.

Please visit Xpeedic at Booth #912 to find out more.

website: http://www.designcon.com/

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ICCAD 2014

Date:Dec. 11-12, 2014.

Location: Hong Kong

Xpeedic Technology, Inc. will exhibit at CSIA-ICCAD 2014 Annual Conference at Hong Kong on Dec. 11-12, 2014.
At Dec 12, Dr.Wenliang Dai, Engineering VP, will present the leading design method-“RFSiP Miniaturization by Integrated Passive Devices(IPD)” with IC industry companion in ICCAD Subject Forum 3.
At booth 1F#21-22,Xpeedic will showcase their high speed signal integrity (SI) solution and RF front end miniaturization solution in the conference. Their fast and accurate SI software enables the quick way to simulate the high speed channel for both pre-layout and post-layout scenarios.Their IP on silicon integrated passive devices (IPD) delivers the industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications.

The conference official  website:
http://www.csia-iccad.net.cn/
http://www.cicmag.com/bbx/856303-856303.html

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Asian IBIS Summit (Shanghai)

Data:  Friday, Nov. 14, 2014.
Location:  Parkyard Hotel Shanghai, 699 Bibo Road, Zhangjiang Hi-Tech Park, Shanghai 201203, P.R. China

Xpeedic Technology, Inc. will participate the Asian IBIS Summit (Shanghai) on Nov. 14, 2014. Dr. Wenliang Dai, VP of Engineering of Xpeedic Technology, Inc.,  will deliver the following speech.
Paper:     Connector Via Footprint Optimization for 25Gbps Channel Design
Authors:  Wenliang Dai and Zhouxiang Su