Xpeedic Announces Major Release of its EDA Tools

Shanghai, China. — Jan 15, 2016 —Xpeedic announces the new major software release of its flagship high speed SI and RFIC EDA tools with the latest 2016.01 version. These tools will be showcased in Xpeedic’s booth (#323) at this year’s DesignCon in Santa Clara, Calif., Jan 20-21, 2016.

Highlights of this major release:

  1. HERMES SI enables quick SI analysis for package and board. The powerful 3D EM solver engine combined with the optimized mesh significantly improves the simulation speed and accuracy. It can also support parametric sweep and interface to HFSS and CST
  2. SnpExpert  adds several new features such as eye diagram, Dk/Df extraction from S-parameter, and S-parameter conversion to broadband HSPICE model and rational function model.
  3. ChannelExpert adds fast channel extraction and analysis for different backplane system architecture such as the conventional one and the orthogonal direct (OD) one. It allows users to import the board layout files to extract the desired channels and run both frequency domain and time domain simulation. The parametrics support automates the channel simulation with full system coverage.

“In the last two years, we have seen the huge demand for high data rate and high bandwidth, which poses tremendous signal integrity challenges in designing high speed communication systems,” said Mr.Zhu, EDA Platform Manager of ZTE. “Xpeedic’s EDA tools have helped us significantly with accurate modeling of impedance discontinuities along the signal path,a rich set of built-in templates, and fast response to our R&D requirements. We are happy to see many new features in the 2016.01 release, which can further improve our productivity.”

“The 2016.01 release is indeed our direct response to customers’ feedback,” said Dr. Feng Ling, CEO of Xpeedic. “We have worked closely with industry leading companies such as ZTE to address their engineering need. With our proprietary fast electromagnetic technologies and the customer-oriented features and modules embedded, SI engineers can greatly benefit from using such tools. ”

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About Xpeedic

Xpeedic Technology, Inc. is a global leading provider of EDA software, IPD, and turn-key SiP design solution. The company is dedicated to help IC design customers with high performance EDA tools and differentiating electronic design service, including high speed digital designs, IC package designs, and RF analog mixed-signal designs. These tools and solutions are widely adopted by Smartphone, tablet, wearable devices and high speed data communication devices.

Founded in 2010, Xpeedic has offices in both US and China, Shanghai and Suzhou. For more information, please visit

DesignCon 2016

DesignCon 2016

Date: Jan. 19-22, 2016.
Location: Santa Clara.

Xpeedic Technology, Inc. will exhibit at DesignCon 2016 at Santa Clara on Jan. 19-22, 2016.

DesignCon is the premier conference for chip, board and systems design engineers in the high speed communications and semiconductor communities. The DesignCon Expo Hall offers the latest products and technologies in signal integrity and high-speed design for your current and future projects. You can test and compare emerging tools and technologies from top tier vendors.

Xpeedic will showcase its latest technology in high speed signal integrity (SI) solution, which can provide a fast and accurate way to enable engineers to simulate the high speed channel for both pre-layout and post-layout scenarios with great confidence, shorten the design cycle, and thus reduce the time to market.

At the same time, you can also find Xpeedic’s IP on silicon integrated passive devices (IPD) , which delivers the industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications.

Visit Xpeedic at Booth #323 to find out more.