sip con

SiP Conference China

Date: Oct 19-20, 2017(Thur.-Fri.)
Place: HILTON SHENZHEN SHEKOU NANHAI, Shenzhen, China

SiP Conferences China 2017 is the first System-in-Package (SiP) conference in China fully dedicated to covering all aspects related to SiPs business and technology to meet current and future SiP challenges. The conference features inspiring sparkers from entire SiP supply and design chain from OEM, Fabless, IDM, OSAT, EMS, EDA, silicon foundries, equipment and material suppliers together to one place in Shenzhen, China.

The SiP Conferences China 2017 is the premier international event that brings the best in packaging, SiP manufacturing assembly and test, advanced SiP architectures and design mythologies, new materials solution to enhance SiP electrical, thermal and mechanical integrities.

Dr.Feng Ling, CEO of Xpeedic Technology will lead the ‘SiP Design and System Integration’session during the conference. Xpeedic team will also demonstrate its latest SiP, IPD and related EDA solutions and products then.

We look forward to meeting you there.

Detail agenda:


For more details, please click here.

台湾workshop

EDA Workshop

尊敬的工程師夥伴,
隨著芯禾科技EDA工具的使用者愈來愈廣,我們很榮幸的向大家推出《芯禾科技EDA Workshop》系列活動,以幫助大家更直接的掌握我們軟件的應用技巧和實戰攻略。
本期課程將以高速訊號設計者的角度,和大家一起探討25Gbps的高速系統設計挑戰和方法。随着乙太網路速率的不斷的提升,在高速系统中將會面臨到哪些關鍵因素的模擬和評估,怎樣優化高速設計中的過孔,焊盤,AC耦合電容,如何整體評估在時域或頻域上的通道品質,這些獨門絕技,我們傾囊相授。
課程將由芯禾科技資深技術支援Frankie及黃智宇講師領銜主講,歡迎有興趣的工程師報名參加。機會難得,歡迎大家報名和專家面對面交流!

培訓安排

  • 時間:2017年10月18日
  • 地點:臺北市忠孝東路三段1號 (億光大樓2樓/北科會議中心)

课程安排

  • 9:00~9:30 簽到
  • 9:30~9:45 培訓概覽
  • 9:45~10:45 系統設計中關鍵因素的模擬和評估
  • 11:00~12:00高速設計中過孔,焊盤,AC耦合電容的優化方法
  • 12:00~13:30 午餐
  • 13:30~14:30 高速設計中線纜及玻纖效應的建模分析
  • 14:45~15:30 通道品質在時域及頻域上的評估
  • 15:30~16:00 軟體現場演示

發送“姓名+公司名稱+職位+手機號碼”至郵箱marketing@xpeedic.com,馬上報名!