Date: Feb. 1-2, 2017.

Location: Santa Clara.

Xpeedic Technology, Inc. will exhibit at DesignCon 2017 at Santa Clara on Feb. 1-2, 2016.

DesignCon is the premier conference for chip, board and systems design engineers in the high speed communications and semiconductor communities. The DesignCon Expo Hall offers the latest products and technologies in signal integrity and high-speed design for your current and future projects. You can test and compare emerging tools and technologies from top tier vendors.

Xpeedic will showcase its latest technology in high speed signal integrity (SI) solution, which can provide a fast and accurate way to enable engineers to simulate the high speed channel for both pre-layout and post-layout scenarios with great confidence.

Here is the highlight of our exhibition:

  • New Product – CableExpert, enabling fast and accurate cable modeling for cable and system companies. Both 2D RLGC and 3D S-parameter models can be generated with built-in templates.
  • New Product – TmlExpert, providing accurate modeling of transmission lines including wideband dielectric model, conductor surface roughness, trapezoid cross section, and conformal solder mask layer. It supports both 2D RLGC model and S-parameter model for PCB transmission lines and the new tabbed routing and serpentine traces.
  • New Product – Hermes SI, enabling full channel EM simulation empowered by the company proprietary solver with unprecedented capacity and speed.
  • New features – ChannelExpert, including post-layout auto channel creation, integrated compliance and COM calculation, integrated crosstalk analysis, HSPICE  integration with IBIS-AMI.
  • New features – SnpExpert, including Dk/Df extraction, passivity/causality enforcement.


Visit Xpeedic at Booth #1053 to find out more.