Xpeedic 2018_IRIS

EDA Release – New Upgrade – IRIS 2018

We are glad to announce that Xpeedic released the RFIC Passive Extraction —— IRIS 2018 this month.

IRIS 2018 obtained the GF 22FDX process certification, provides a 3D fast EM simulation tool integrated in Cadence Virtuoso design flow. The fast 3D method of moments solver with both multi-core and distributed parallelization greatly reduces the EM simulation time thus improves the design efficiency. The seamless integration with Virtuoso not only enables designers to stay in the Cadence design environment to perform the EM simulation which avoids the manual and error-prone layout data conversion, but also realizes the perfect convergence to front-end for design verification by automatic back-annotation.

 What’s new in IRIS 2018

  • Support bias table and rho table in IRIS to account for technology variations for advanced IC nodes. 
  • Improve via merge efficiency with 10x speedup for large scale via arrays and make via merge one-time operation to save re-run overhead.
  • Support IRIS export to HFSS 3D Layout with tuned simulation settings to ensure accuracy as part of Xpeedic and Ansys software partnership.
  • Unify IRIS2HFSS and IRIS2HFSS3DLayout flow to simplify IRIS simulation project export usage.
  • Support automated port search and define feature based on pre-defined pin position.
  • Support Synopsys StarRC Interconnect Technology Format (*.itf) and IRIS Technology (*.lyr) conversion.
  • Reduce IRIS simulation options to simplify IRIS usage and give better user experience.

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