Xpeedic to Exhibit at GTC China 2018

Date: November 1, 2018

Place: Shanghai, China

As a valuable GLOBALFOUNDRIES EDA partner, Xpeedic Technology will showcase its latest solutions at GTC China 2018 (GLOBALFOUNDRIES Technology Conference) in Shanghai, November 1, 2018.

Featured as in-booth demos will include

GTC AD

  • Combined IRIS-HFSS Flow for EM simulation in GLOBALFOUNDRIES Process Nodes

This flow is seamlessly integrated in Cadence Virtuoso platform, and gives IC designers not only the fast and accurate passive modeling and synthesis capability at the design stage with Xpeedic accelerated Method of Moments (MoM) solver engine and artificial neural network(ANN) technique , but also the verification capability enabled by HFSS at the sign-off stage.

  • Integrated Passived Device Technology for RF Front End Design

IPD is a core technology for implementing highly integrated RF front-end modules. Utilizing high-resistance silicon and thick copper processes, IPD has both consistency and high integration of semiconductor process, and good RF performance similar to traditional thick film processes such as LTCC. With its unique IPD design methodology and process, Xpeedic has developed a series of filters, duplexers, couplers, power dividers and other devices, which are widely used in antenna switch modules, power amplifier modules and other RF front-end modules.

  • IPD-enabled System-in-Package for Integrated System

SiP technology can integrate multiple chips of different processes (CMOS, SOI, GaAs, etc.) and different functions (digital, analog, RF, etc.) into one package, achieving the advantages of miniaturization, high performance and low cost. Xpeedic can also integrate its unique IPD into SiP and achieve even higher integration. Thanks to its proprietary EDA tools, dedicated IPD/SiP design teams, wafer and packaging partners, the company is able to provide customers with one-stop SiP solutions and services.

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