Date: April 2-3, 2019
Location: Santa Clara Convention Center – Santa Clara, CA
CDNLive Silicon Valley brings together Cadence® technology users, developers, and industry experts for networking, sharing best practices on critical design and verification issues, and discovering new techniques for designing advanced silicon, SoCs, and systems that transform the way people live, work, and play.
As Cadence Connections program value member, Xpeedic will demonstrate its latest EDA solutions at Designer Expo and will present the following technical paper with Cisoco.
Title: Enabling Pin Field Crosstalk Scan for High-Speed Designs
Author: Feng Ling, Xpeedic, Kevin Cai and Bidyut Sen, Cisco
Time: 9:30AM-10:10AM, April 2