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Xpeedic to Exhibit at TowerJazz TGS2018

Date: August 22, 2018

Place: Shanghai, China

 

As a valuable TowerJazz EDA partner, Xpeedic Technology will showcase its latest solutions at TGS 2018 (TowerJazz Technical Global Symposium) in Shanghai, August 22, 2018.

Featured as in-booth demos will include

TowerJazz AD_V3

  • Combined IRIS-HFSS Flow for Passive Modeling and Verification in Advanced TowerJazz RF and high performance analog process nodes.

This flow is seamlessly integrated in Cadence Virtuoso platform, and gives IC designers not only the fast and accurate passive modeling and synthesis capability at the design stage with Xpeedic accelerated Method of Moments (MoM) solver engine and artificial neural network(ANN) technique , but also the verification capability enabled by HFSS at the sign-off stage.

  • Integrated Passived Device Technology for RF Front End Design

IPD is a core technology for implementing highly integrated RF front-end modules. Utilizing high-resistance silicon and thick copper processes, IPD has both consistency and high integration of semiconductor process, and good RF performance similar to traditional thick film processes such as LTCC. With its unique IPD design methodology and process, Xpeedic has developed a series of filters, duplexers, couplers, power dividers and other devices, which are widely used in antenna switch modules, power amplifier modules and other RF front-end modules.

  • IPD-enabled System-in-Package for Integrated System

SiP technology can integrate multiple chips of different processes (CMOS, SOI, GaAs, etc.) and different functions (digital, analog, RF, etc.) into one package, achieving the advantages of miniaturization, high performance and low cost. Xpeedic can also integrate its unique IPD into SiP and achieve even higher integration. Thanks to its proprietary EDA tools, dedicated IPD/SiP design teams, wafer and packaging partners, the company is able to provide customers with one-stop SiP solutions and services.

TGS is an annual global event, which facilitates customer and partner interaction with TowerJazz team and industry executives to exchange information on the latest unique and advanced solutions for next-generation ICs in today’s growing markets such as consumer, industrial, automotive, medical and aerospace and defense.

For more information, please visit here.

EMC

Xpeedic to Present Two Papers at IEEE EMC+SIPI 2018

Date: 7/30-8/3, 2018

Location: Long Beach, CA, US

Xpeedic will participate in the 2018 IEEE Symposium on Electromagnetic Compatibility and Signal, Power Integrity (EMC+SIPI) held at Long Beach Convention Center in California, USA on July 30-Aug 3, 2018.

Xpeedic has two papers accepted after a rigorous peer review process and will present them at the following time slots:

Fast Full Board Crosstalk Scan for Signal Integrity Sign-Off for High Speed PCB Designs

  • Time: 7/31 4:00PM
  • Author: Feng Ling (Xpeedic Technology); Kevin Cai (Cisco Systems, US); Bidyut Sen (Cisco Systems, US)

An Empirical Model for Foamed High-Speed Cable

  • Time: 8/2 4:00PM
  • Author: Xin Wu (Wandtec (Shenzhen) Optronics Technology); Feng Ling (Xpeedic Technology)

We look forward to meeting you there.

For more details, please click here.

IMS2018-1

Xpeedic to Exhibit at IMS2018 in Philadelphia

Xpeedic Technology will showcase its latest solutions at the 2018 IEEE MTT-S International Microwave Symposium (IMS) in Philadelphia, June 12-14.

Featured as in-booth demos will include

  • Combined IRIS-HFSS Flow for Passive Modeling and Verification in Advanced Process Nodes.
    This flow is seamlessly integrated in Cadence Virtuoso platform, and gives IC designers not only the fast and accurate passive modeling and synthesis capability at the design stage with Xpeedic accelerated Method of Moments (MoM) solver engine and artificial neural network(ANN) technique , but also the verification capability enabled by HFSS at the sign-off stage.
  • Integrating IRIS Plus in Nuhertz FilterSolutions to Enable Fast Filter Simulation.
    It presents a fast filter design flow by taking advantage of both the filter synthesis from Nuhertz FilterSolutions and the 3D full-wave electromagnetic simulation from Xpeedic IRIS Plus. Designers can use this combined single flow for fast filter prototyping without manually transferring CAD data from layout to EM simulation, thus improving the design efficiency.
  • Through Glass Via (TGV) Based Integrated Passive Device Technology for RF Front End Design
    Through Glass Via technology has become a promising technology candidate to realize integrated, low cost and high performance passive devices. Xpeedic will introduce passive device (such as filters and diplexers) technology built with TGV, which can have less in-band insertion loss and greater out-of-band rejection yet still compact size.

X展架-IMS2018-Q.cdr

For more information, visit Xpeedic at Booth 1705 at the show.

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DAC2018

Xpeedic to Exhibit at DAC2018

Date: June 25-27, 2018

Place: San Francisco, CA, US

Booth#: 2041

The Design Automation Conference (DAC) is the premier conference devoted to the design and automation of electronic systems (EDA), embedded systems and software (ESS), and intellectual property (IP).

As a global leading provider of EDA software and Integrated Passive Device (IPD), Xpeedic will showcase its EDA and IP solution and several fascinating demos, including IRIS for passive modeling and simulation in advanced nodes, IRIS for both high-resistivity silicon (HRSi) and through-glass-via (TGV) based IPD design, Hermes for 3D package simulation, and expert-series signal integrity tools for high speed systems.

wechat-demo

Xpeedic is also invited to participate at Samsung Foundry's DAC 2018 Theater as a valuable SAFE partner. Xpeedic CEO, Dr. Feng Ling will give the presentation titled “Accurate Passive Modeling and Simulation for Advanced Process Nodes” at Samsung's booth.

wechat-speech

More details to see https://dac.com/

EDI CON 2018

Xpeedic to Exhibit at EDI CON China 2018

Date: Mar 20-22, 2018.
Location: Beijing, China
Booth: 603

EDI CON is an opportunity for design engineers and system integrators to learn about the latest RF/microwave and high speed digital products and technologies for today's communication, computing, RFID, industrial wireless monitoring, navigation, aerospace and related markets. With a focus on applications, emerging technologies and practical engineering solutions, this annual event brings together the designers at the forefront of Chinese innovation and the world's leading multi-national technology companies. EDI CON includes keynotes presentations from industry executives and government officials, technical presentations, workshops, expert panels, exhibitor showcase and networking reception. The three day event will be held March 20-22, 2018 at the China National Convention Center in Beijing, China.

Xpeedic will showcase its high speed signal integrity solution and integrated RFIC solution, including EDA software, IPD (Integrated passive devices) and SiP (System in package) service within the exhibition. Xpeedic’s silicon-based IPD technology, including standard IPD library for cellular and WiFi applications and turn-key customized IPD design, delivering industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications. Xpeedic’s EDA software tools enables fast electromagnetic modeling and extraction, which helps customers to achieve shorter time to market for their products.

More details to see http://www.ediconchina.com/default.asp

sip con

SiP Conference China

Date: Oct 19-20, 2017(Thur.-Fri.)
Place: HILTON SHENZHEN SHEKOU NANHAI, Shenzhen, China

SiP Conferences China 2017 is the first System-in-Package (SiP) conference in China fully dedicated to covering all aspects related to SiPs business and technology to meet current and future SiP challenges. The conference features inspiring sparkers from entire SiP supply and design chain from OEM, Fabless, IDM, OSAT, EMS, EDA, silicon foundries, equipment and material suppliers together to one place in Shenzhen, China.

The SiP Conferences China 2017 is the premier international event that brings the best in packaging, SiP manufacturing assembly and test, advanced SiP architectures and design mythologies, new materials solution to enhance SiP electrical, thermal and mechanical integrities.

Dr.Feng Ling, CEO of Xpeedic Technology will lead the ‘SiP Design and System Integration’session during the conference. Xpeedic team will also demonstrate its latest SiP, IPD and related EDA solutions and products then.

We look forward to meeting you there.

Detail agenda:


For more details, please click here.

EPEPS 2017

EPEPS 2017

Date: Oct 15-18, 2017.
Location: San Jose, CA, US

EPEPS (Electrical Performance of Electronic Packaging and Systems) is the premier international conference on advanced and emerging issues in electrical modeling, analysis and design of electronic interconnections, packages and systems. It also focuses on new methodologies and design techniques for evaluating and ensuring signal, power and thermal integrity in high-speed designs.

Xpeedic will showcase their latest update in RF front end miniaturization solution and high speed signal integrity (SI) solution in the conference. Their IP on silicon integrated passive devices (IPD) delivers the industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications. Their fast and accurate SI software enables the quick way to simulate the high speed channel for both pre-layout and post-layout scenarios.

More details to see http://www.epeps.org/

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DAC54th

Xpeedic to Exhibit at DAC2017

Date:June 18-22, 2017
Place:Austin, US
Booth#:1923

The Design Automation Conference (DAC) is the premier conference devoted to the design and automation of electronic systems (EDA), embedded systems and software (ESS), and intellectual property (IP).

Xpeedic will showcase its EDA solution and IP solution in this event at Booth #1923. As a global leading provider of EDA software and Integrated Passive Device (IPD), Xpeedic’s analog / mixed-signal IC software tools help IC engineers to shorten their design cycle at the latest advanced semiconductor nodes. The signal integrity software tools enable faster design closure for IC package and PCB system designs. The growing IP portfolio on IPD delivers the industry-leading combination of performance and integration to enable SiP for RF front end module designs. All these tools and solutions have been widely adopted by companies who make mobile and IoT devices, computing and network systems.

More details to see https://dac.com/