Xpeedic to Exhibit at EDAPS 2015

Date: Dec 14-16, 2015.
Location: COEX, Seoul, Korea

The IEEE Electrical Design of Advanced Packaging and Systems (EDAPS) Symposium is the premier international conference in Asia Pacific region to share the recent progress of modeling, simulation and measurement for the electrical design issues on chip, package and system levels. The technical program of the symposium not only addresses the current technical issues but also brings out the challenges facing IC design, SiP/SoP packaging, EMI/EMC, EDA tools and most importantly the challenge issues in advanced 3D-IC and TSV design. As in the previous events over a decade, the EDAPS 2015 will provide a major platform for researchers from academia and industry to exchange their knowledge and to build up networks.

Xpeedic will showcase its latest technology on EDA software, IPD and SiP solution. Xpeedic EDA software tools enables fast electromagnetic modeling and extraction. The IP on silicon integrated passive devices (IPD) delivers the industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications.

More details to see www.edaps2015.org

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Xpeedic At IEEE EDAPS 2011

Suzhou, China — Nov. 28, 2011
Xpeedic Technology, Inc. will at IEEE EDAPS 2011, being held at Hangzhou, China on Dec. 12-14, 2011. Feng Ling, Founder/CEO of Xpeedic Technology, Inc. will organize a special workshop “EDA Solution for Chip, Package, and Board Designs”. Leading EDA vendors will present their solutions on various topics including TSV modeling, SI/PI simulation, co-simulation, and channel analysis. Dr. Wenliang Dai, VP of Engineering of Xpeedic Technology, Inc.,  will deliver the speech titled “Enabling Optimal Channel Performance by Interconnect Tuning”.