DesignCon2019

Xpeedic SI Live Demo at DesignCon2019

Hi all,

We are very glad to announce Xpeedic's high-speed signal integrity live demo series at DesignCon 2019.

The demos will focus on eight hottest topics, and will be presented by industry experts at Xpeedic booth. You will also get chance to receive the new year gifts from Xpeedic.

Signal Integrity Demo Highlights

  • IEEE P370 compatible de-embedding and quality check for measured S-parameters up to 50GHz
  • Through-Only De-embedding (TOD) and optimization based Dk/Df extraction for high-speed and wideband applications
  • Quick via modeling and optimization from connector footprint
  • Fast SI/PI simulation of 2.5D interposer with TSV
  • Fast and accurate fiber weave modeling and simulation
  • Automated crosstalk scan, impedance scan and DRC+ for signal integrity signoff
  • Automated full channel crosstalk analysis and design margin evaluation for high speed backplane systems
  • Web-based passive model management for SI/PI engineers

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MEET US AT

DesignCon2019   |    Booth 525

Select topics and join us!

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Banner-Designcon2019

Xpeedic to Exhibit at DesignCon 2019

Date: Jan.29-31, 2019

Location: Santa Clara, CA

Booth#: 525

Xpeedic Technology, Inc. will exhibit at DesignCon 2019 at Santa Clara on Jan.29-31, 2019.

DesignCon is the premier conference for chip, board and systems design engineers in the high speed communications and semiconductor communities. The DesignCon Expo Hall offers the latest products and technologies in signal integrity and high-speed design for your current and future projects. You can test and compare emerging tools and technologies from top tier vendors.

At Booth 525, Xpeedic will showcase their latest update in RF front end miniaturization solution and high speed signal integrity (SI) solution in the conference. Their IP on silicon integrated passive devices (IPD) delivers the industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications. Their fast and accurate SI software enables the quick way to simulate the high speed channel for both pre-layout and post-layout scenarios.

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Register now and use our promo code SPECIAL for a free Expo Pass &20% off any conference Pass!

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ICCAD 2018

Xpeedic to Exhibit at ICCAD 2018

Date: Nov.29-30, 2018

Location: Zhuhai, China

Booth#: 003-004

Xpeedic Technology, Inc. will exhibit at CSIA-ICCAD 2018 Annual Conference & Zhuhai IC Industry Innovation and Development Summit (ICCAD 2018) in Zhuhai on Nov.29-30, 2018.

ICCAD is a most important annual event for IC design industry in China. It creates a biggest platform for enterprises within China IC industry chain to exchange their expertise and to build up networks. This year, the theme is “Linking Core Power, Leading intelligence of the Great Bay Area”. In this annual general meeting, the Integrated Circuit industry, especially the opportunities and challenges faced by the IC Design industry, will be discussed in details in order to enhance innovation capability and improve the comprehensive capability of Chinese Integrated Circuit industrial chain, thereby satisfying the market demands and boosting international competence.

At booth 003-004 , Xpeedic will showcase their latest update in RF front end miniaturization solution and high speed signal integrity (SI) solution in the conference. Their IP on silicon integrated passive devices (IPD) delivers the industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications. Their fast and accurate SI software enables the quick way to simulate the high speed channel for both pre-layout and post-layout scenarios.

Dr. Wenliang Dai, co-founder, VP Engineering, will also present the leading design method “Addressing Modeling and Simulation Challenges for IC, Package and System” within EDA and IC Design Service forum on Nov.30.

For more details, please click here.

IMS2018-1

Xpeedic to Exhibit at IMS2018 in Philadelphia

Xpeedic Technology will showcase its latest solutions at the 2018 IEEE MTT-S International Microwave Symposium (IMS) in Philadelphia, June 12-14.

Featured as in-booth demos will include

  • Combined IRIS-HFSS Flow for Passive Modeling and Verification in Advanced Process Nodes.
    This flow is seamlessly integrated in Cadence Virtuoso platform, and gives IC designers not only the fast and accurate passive modeling and synthesis capability at the design stage with Xpeedic accelerated Method of Moments (MoM) solver engine and artificial neural network(ANN) technique , but also the verification capability enabled by HFSS at the sign-off stage.
  • Integrating IRIS Plus in Nuhertz FilterSolutions to Enable Fast Filter Simulation.
    It presents a fast filter design flow by taking advantage of both the filter synthesis from Nuhertz FilterSolutions and the 3D full-wave electromagnetic simulation from Xpeedic IRIS Plus. Designers can use this combined single flow for fast filter prototyping without manually transferring CAD data from layout to EM simulation, thus improving the design efficiency.
  • Through Glass Via (TGV) Based Integrated Passive Device Technology for RF Front End Design
    Through Glass Via technology has become a promising technology candidate to realize integrated, low cost and high performance passive devices. Xpeedic will introduce passive device (such as filters and diplexers) technology built with TGV, which can have less in-band insertion loss and greater out-of-band rejection yet still compact size.

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For more information, visit Xpeedic at Booth 1705 at the show.

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DAC2018

Xpeedic to Exhibit at DAC2018

Date: June 25-27, 2018

Place: San Francisco, CA, US

Booth#: 2041

The Design Automation Conference (DAC) is the premier conference devoted to the design and automation of electronic systems (EDA), embedded systems and software (ESS), and intellectual property (IP).

As a global leading provider of EDA software and Integrated Passive Device (IPD), Xpeedic will showcase its EDA and IP solution and several fascinating demos, including IRIS for passive modeling and simulation in advanced nodes, IRIS for both high-resistivity silicon (HRSi) and through-glass-via (TGV) based IPD design, Hermes for 3D package simulation, and expert-series signal integrity tools for high speed systems.

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Xpeedic is also invited to participate at Samsung Foundry's DAC 2018 Theater as a valuable SAFE partner. Xpeedic CEO, Dr. Feng Ling will give the presentation titled “Accurate Passive Modeling and Simulation for Advanced Process Nodes” at Samsung's booth.

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More details to see https://dac.com/

EDI CON 2018

Xpeedic to Exhibit at EDI CON China 2018

Date: Mar 20-22, 2018.
Location: Beijing, China
Booth: 603

EDI CON is an opportunity for design engineers and system integrators to learn about the latest RF/microwave and high speed digital products and technologies for today's communication, computing, RFID, industrial wireless monitoring, navigation, aerospace and related markets. With a focus on applications, emerging technologies and practical engineering solutions, this annual event brings together the designers at the forefront of Chinese innovation and the world's leading multi-national technology companies. EDI CON includes keynotes presentations from industry executives and government officials, technical presentations, workshops, expert panels, exhibitor showcase and networking reception. The three day event will be held March 20-22, 2018 at the China National Convention Center in Beijing, China.

Xpeedic will showcase its high speed signal integrity solution and integrated RFIC solution, including EDA software, IPD (Integrated passive devices) and SiP (System in package) service within the exhibition. Xpeedic’s silicon-based IPD technology, including standard IPD library for cellular and WiFi applications and turn-key customized IPD design, delivering industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications. Xpeedic’s EDA software tools enables fast electromagnetic modeling and extraction, which helps customers to achieve shorter time to market for their products.

More details to see http://www.ediconchina.com/default.asp

designcon2018

Xpeedic SI Live Demo at DesignCon

Hi All,

We are very glad to announce Xpeedic's high-speed signal integrity live demo series at DesignCon 2018.

The demos will focus on six hottest topics. Several industry experts will present the demos and accommodate interactive discussions. There will also be a lucky draw at the end of each demo session.

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Topics – High-Speed Signal Integrity Live Demo

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MEET US AT

DesignCon2018   |    Booth 1034

Select topics and book your seat!

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DesignCon 2018

Please Join Us in Santa Clara for DesignCon 2018

This is your exclusive invitation to attend the largest meeting of chip, board, and systems design engineers with a complimentary Expo Pass or a 20% discount on Conference Packages! Now in its 23rd year, DesignCon offers high-caliber content, rich technical education, and in-depth training – all created by engineers for engineers.

This special discount comes to you courtesy of:

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Visit us at Booth #1034 

Register now and save 20% on your choice of an All-Access or 2-Day Pass by using this promo code EXD-EprTiC17 — or claim your complimentary Expo Pass. Start the new year ahead of the rest.

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