EDA

IRIS Plus

Fast RFIC and MMIC Passive Extraction

• Support import IRIS project file modeling
• Support import GDS file modeling
• Support serpentine routing model modeling
• Support RFIC modeling
• Support RFPCB modeling
• Support import Allegro RFPCB component with one click
• Support stackup setting by layer
• Support mesh size setting based on frequency
• Auto port searching simplifies EM setup
• Support metal 3D model to capture sidewall effect, and make it suitable for 45nm technology and below
• Support metal-slot removal option to improve simulation speed
• Introduce multi-threading technology to Green’s Function, greatly improve the database creation efficiency
• Optimized mesh to balance speed and accuracy, support rectangle and triangle mixed mesh to improve simulation speed
• Auto via array disfeaturing when generate mesh file
• Support 3D model display
• Support parallel processing techniques, especially for multi-threading processing
• Support batch simulation when multiple simulation jobs exist
• Support EM simulation results back-annotation
• Support export IRIS Plus model to HFSS with one click

IVERIFIER

RF Passive PDK Verification

• Seamless integration with the design platform of Cadence Virtuoso.
• Supports parametric scanning of the two processes of schematic and layout, and adopts Spectre and EM simulation respectively.
• Multiple model calculation templates are built in to quickly extract electrical parameters.
• Embedded multi-function visual data analysis, data processing module.
• Accelerated MOM solution simulate complex electromagnetic environment including skin effect, proximity effect and multilayer dielectric losses.
• Support adaptive mesh,auto defined metal model (sheet, thick, 3D), auto defined mesh size based on model physical size.
• Support for parallel and distributed computing.
• Support 3D model display.
• Support HFSS project export.

VIAEXPERT

Via Modeling and Simulation

• Optimized mesh function improves simulation speed and precision.
• Fast 3D FEM solver offers better fidelity and quality.
• Fast Hybrid solver offers better capacity and speed compared to other tools in market.
• Multiple ways to create models or import Allegro brd.
• Use templates to create SMD/SMA/AC Decap model
• Auto port generation simplifies EM analysis setup.
• Support parametric and optimization sweep simulation.
• 3D-View makes the model check easier.
• Export to HFSS and CTS.
• SnpExpert displays S-parameter and TDR.

CABLEEXPERT

Cable Modeling and Simulation

• Built-in template to allow easy cable modeling
• Support different drain types including center drain and dual drain
• Support different twine shielding including longitudinal and wrapping twine shielding
• Auto port generation to simplify EM setup
• Supports parametric sweep for easy what-if analysis
• 2D FEM solver to generate RLGC model
• 3D FEM solver to generate S-parameter model
• Interface to HFSS

HERMES SI

Package and Board level signal integrity analysis

• Optimized mesh algorithm improves simulation speed and precision
• Fast 3D FEM solver provides high-precision, high-quality solution
• Hybrid solver provides high-speed solution, performance is higher than similar products in market
• Support import brd model
• Manually add port, analysis setting
• The 3D view function makes the model checking more easily and visually
• Support export result to HFSS and CTS

Heracles

Automated SI Signoff for High Speed Design

• Heracles provides an automated SI signoff flow for high speed design, and enable quick crosstalk scan, impedance scan and design rule check beyond Allegro
• Built-in versatile EM solver engines with controllable accuracy and speed to achieve full board scan within a few hours, including FEM3D solver, Hybrid Solver and Pure Via Solver
• Introduce frequency domain integrated crosstalk noise (ICN) and time domain waveform TDT as crosstalk metrics, and allows quick assessment of the crosstalk by simply comparing them against the pass/warning/failure thresholds
• Built-in high speed I/O compliance such as Ethernet, PCI Express, DDR, USB, SATA and SAS, which crosstalk poses great challenges for high speed PCB designers with the ever increasing data rate
• Provides two flexible ways to select crosstalk scan areas with potential SI issues, either by net matching rules defined in high speed I/O compliances or selected manually
• Heracles XSE provides interactive interface to invoke ViaExpert to visualize, sweep and optimize crosstalk model, and also export to HFSS for better correlation
• Support intuitive crosstalk level display for the selected nets in either a table or plot format. It also maps to the layout with different colors to allow quick hotspot location identification

Metis

Fast Package and IC Co-simulation

• Support GDSII, Allegro .brd/.mcm/*.sip import, and crop arbitrary area for simulation
• Optimized mesh to balance speed and accuracy, support rectangle and triangle mixed mesh to improve simulation speed and convergence
• SnpExpert provides powerful S-Parameter post-process capability
• Metis provides an integrated design environment to simulate SI and PI for large scale silicon interposer, and simultaneously co-simulate the complete IC and package to identify their interactions
• Accelerated 3D planar EM solver based on the Method of Moment (MoM) delivers the best performance in both speed and accuracy, and enable chip-level packaging and ICs/packages co-simulation across a range of scales from nanometer to centimeter
• Support ICs and package co-simulation results back-annotated to Virtuoso and enable circuit level system simulation for both Windows and Linux platform
• Support net reconstruction and net identifying, allows easy model building for SI and PI simulation
• Support parallel processing techniques, including multi-threading processing and distributed processing to improve solver performance speedup and efficiency, and fully utilize hardware computing resources
• Easy export Metis simulation project to HFSS with tuned simulation setting to ensure accuracy