Fast RFIC Passive Extraction
- 3D full-wave EM solver
- Multi-core parallelization and distributed computing
- Accurate modeling of substrate loss and conductor skin effect
- Large number of port model extraction and back-annotation to schematic
Fast RFIC and MMIC Passive Extraction
- Support import IRIS project file modeling
- Support import GDS file modeling
- Support serpentine routing model modeling
- Support RFIC modeling
- Support RFPCB modeling
- Support import Allegro RFPCB component with one click
- Support stackup setting by layer
- Support mesh size setting based on frequency
- Auto port searching simplifies EM setup
- Support metal 3D model to capture sidewall effect, and make it suitable for 45nm technology and below
- Support metal-slot removal option to improve simulation speed
- Introduce multi-threading technology to Green’s Function, greatly improve the database creation efficiency
- Optimized mesh to balance speed and accuracy, support rectangle and triangle mixed mesh to improve simulation speed
- Auto via array disfeaturing when generate mesh file
- Support 3D model display
- Support parallel processing techniques, especially for multi-threading processing
- Support batch simulation when multiple simulation jobs exist
- Support EM simulation results back-annotation
- Support export IRIS Plus model to HFSS with one click
Fast PDK Model Generation
- Parameterized Layout Design
- PDK EM Model Extraction
- PDK Equivalent Circuit Generation
- Customized PDK Generation
- Automatical Simulation Data Post-Processing
- Large Number of Parameters Sweeping Technology
- Correlation between PDK Measurement & Simulation
RF Passive PDK Verification
- Seamless integration with the design platform of Cadence Virtuoso.
- Supports parametric scanning of the two processes of schematic and layout, and adopts Spectre and EM simulation respectively.
- Multiple model calculation templates are built in to quickly extract electrical parameters.
- Embedded multi-function visual data analysis, data processing module.
- Accelerated MOM solution simulate complex electromagnetic environment including skin effect, proximity effect and multilayer dielectric losses.
- Support adaptive mesh,auto defined metal model (sheet, thick, 3D), auto defined mesh size based on model physical size.
- Support for parallel and distributed computing.
- Support 3D model display.
- Support HFSS project export.
S-parameter Exploration
- Both frequency domain S-parameter and TDR plot
- One-click to define diff pairs and victim/aggressor pairs
- Built-in crosstalk plots including FEXT, NEXT, PSXT, ILD, ICN, and ICR
- Built-in compliance metrics
- Built-in passivity/causality/reciprocity/stability metrics
- Built-in delay and skew calculator
- Built-in template plot for RF components
- Built-in Tline2D Calculator
- Built-in Thru-Only De-embedding
Via Modeling and Simulation
- Optimized mesh function improves simulation speed and precision.
- Fast 3D FEM solver offers better fidelity and quality.
- Fast Hybrid solver offers better capacity and speed compared to other tools in market.
- Multiple ways to create models or import Allegro brd.
- Use templates to create SMD/SMA/AC Decap model
- Auto port generation simplifies EM analysis setup.
- Support parametric and optimization sweep simulation.
- 3D-View makes the model check easier.
- Export to HFSS and CTS.
- SnpExpert displays S-parameter and TDR.
Channel Exploration
- Easy multiple channel creation by table with only one-click
- Built-in substrate and stackup databases
- Parametric S-Parameter and transmission line physical parameters for easy channel exploration
- Integrate SnpExpert into ChannlExpert seamlessly to automate compliance check for popular standards like CEI-25G-LR, IEEE 802.3bj and others.
Cable Modeling and Simulation
- Built-in template to allow easy cable modeling
- Support different drain types including center drain and dual drain
- Support different twine shielding including longitudinal and wrapping twine shielding
- Auto port generation to simplify EM setup
- Supports parametric sweep for easy what-if analysis
- 2D FEM solver to generate RLGC model
- 3D FEM solver to generate S-parameter model
- Interface to HFSS
TML Modeling and Simulation
- Transmission line calculator for SE, differential, and N-trace microstrip and stripline
- Built-in serpentine line template
- Built-in tabbed routing template
- Parametric support for parameter sweep
- 2D Finite Element Method (FEM) for transmission line calculator
- 3D Finite Element Method (FEM) for serpentine lines and tabbed routing lines
Package and Board level signal integrity analysis
- Optimized mesh algorithm improves simulation speed and precision
- Fast 3D FEM solver provides high-precision, high-quality solution
- Hybrid solver provides high-speed solution, performance is higher than similar products in market
- Support import brd model
- Manually add port, analysis setting
- The 3D view function makes the model checking more easily and visually
- Support export result to HFSS and CTS
Simulation Job Queue System
- Both Windows and Linux simulation platform were supported, in order to meet all customers’ requirements
- Support multiple simulation tools, including HFSS, IRIS Plus and so on
- Based on C/S architecture, so it’s quite easy to deploy, upgrade and play
- Support several major browsers for better usability, such as Chrome, IE and Firefox
- Support several user roles with different access permission, including administrator, ordinary user and super user
- Maximize computing resource usage by fully utilizing cluster scheduler, such as LSF, SGE and PBS
- Maximize simulation speed and efficiency by fully utilizing parallel computing and distributed computing
- Maximize simulation tool usage and save GUI license cost by fully utilizing queuing and batch simulation technology
- All submitted simulation projects were managed and supervised by project management module for easy back trace and reuse
- Simulation results and convergence status real time display improve simulation efficiency and productivity
Automated SI Signoff for High Speed Design
- Heracles provides an automated SI signoff flow for high speed design, and enable quick crosstalk scan, impedance scan and design rule check beyond Allegro
- Built-in versatile EM solver engines with controllable accuracy and speed to achieve full board scan within a few hours, including FEM3D solver, Hybrid Solver and Pure Via Solver
- Introduce frequency domain integrated crosstalk noise (ICN) and time domain waveform TDT as crosstalk metrics, and allows quick assessment of the crosstalk by simply comparing them against the pass/warning/failure thresholds
- Built-in high speed I/O compliance such as Ethernet, PCI Express, DDR, USB, SATA and SAS, which crosstalk poses great challenges for high speed PCB designers with the ever increasing data rate
- Provides two flexible ways to select crosstalk scan areas with potential SI issues, either by net matching rules defined in high speed I/O compliances or selected manually
- Heracles XSE provides interactive interface to invoke ViaExpert to visualize, sweep and optimize crosstalk model, and also export to HFSS for better correlation
- Support intuitive crosstalk level display for the selected nets in either a table or plot format. It also maps to the layout with different colors to allow quick hotspot location identification
Library Management Platform
- A unified platform to search and manage your IP address and libraries, including HDL, IPD, PDK library and more
- Based on B/S architecture, so it’s simple to install, upgrade and play
- Supports the three major browsers for better usability; Chrome, IE and Firefox
- Built-in version control system ensures library data access consistency and keeps operation and modification history to allow effortless traceability
- Ensures system stability and security with residency services, monitoring services and communication services
- Distributed file and database management service will produce complete and consistent library files instead of manual maintainance to improve library correctness and productivity
- Supports several user roles with different access permission, including administrator, manager, and basic user
- Publishing and updating HDL, PDK and IPD library regularly to unified share paths, and monitored by a timing service
- Statistical graphs help users getdetailed information about library management
Fast Package and IC Co-simulation
- Support GDSII, Allegro .brd/.mcm/*.sip import, and crop arbitrary area for simulation
- Optimized mesh to balance speed and accuracy, support rectangle and triangle mixed mesh to improve simulation speed and convergence
- SnpExpert provides powerful S-Parameter post-process capability
- Metis provides an integrated design environment to simulate SI and PI for large scale silicon interposer, and simultaneously co-simulate the complete IC and package to identify their interactions
- Accelerated 3D planar EM solver based on the Method of Moment (MoM) delivers the best performance in both speed and accuracy, and enable chip-level packaging and ICs/packages co-simulation across a range of scales from nanometer to centimeter
- Support ICs and package co-simulation results back-annotated to Virtuoso and enable circuit level system simulation for both Windows and Linux platform
- Support net reconstruction and net identifying, allows easy model building for SI and PI simulation
- Support parallel processing techniques, including multi-threading processing and distributed processing to improve solver performance speedup and efficiency, and fully utilize hardware computing resources
- Easy export Metis simulation project to HFSS with tuned simulation setting to ensure accuracy
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