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Xpeedic Opens its Sillicon Valley Operation Center

Silicon Valley, US. — Feb 2, 2017 —Xpeedic Technology, Inc., a global leading provider of EDA software has announced to open its Silicon Valley operation center to best serve the needs of the customers and partners in north America market. The new operation center will deliver both the regional sales and technical support functions.

Founded in 2010, Xpeedic has long-established sales presence in China and offices in both US and China. Xpeedic is a global leading provider of EDA software, Integrated Passive Device (IPD), and System-in-Package (SiP) design solution. The analog/mixed-signal IC software tools help IC engineers to shorten their design cycle at the latest advanced semiconductor nodes. The signal integrity software tools enable faster design closure for IC package and PCB system designs. The growing IP portfolio on IPD delivers the industry-leading combination of performance and integration to enable SiP for RF front end module designs. All these tools and solutions have been widely adopted by companies who make mobile and IoT devices, computing and network systems.

This initiative is following customer-oriented company strategy, and will not only allow Xpeedic to be closer to customers in key markets, it will also provide the opportunity to work closer with strategic partners and keep Xpeedic with the latest advanced industry nodes.

About Xpeedic

Xpeedic Technology, Inc. is a global leading provider of EDA software, Integrated Passive Device (IPD), and System-in-Package (SiP) design solution. The analog/mixed-signal IC software tools help IC engineers to shorten their design cycle at the latest advanced semiconductor nodes. The signal integrity software tools enable faster design closure for IC package and PCB system designs. The growing IP portfolio on IPD delivers the industry-leading combination of performance and integration to enable SiP for RF front end module designs. These tools and solutions have been widely adopted by companies who make mobile and IoT devices, computing and network systems.

Founded in 2010, Xpeedic has offices in both US and China. For more information, please visit www.xpeedic.com.

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Xpeedic to Exhibit at EDI CON China 2016

Date: Apr 19-21, 2016.
Location: Beijing, China
Booth: 432

EDI CON brings together leading RF, microwave, high-speed analog and mixed signal components, semiconductor, test and measurement equipment, materials and packaging, EDA/CAD and system solution providers in the exhibition. Unlike other shows with a separate more academic focused conference, EDI CON has industrial and technology leaders delivering most of the technical sessions, workshops and panels so that the exhibition is closely coupled with the conference. This makes the exhibition an extension of the technical conference where attendees can learn first-hand about products and services that offer practical solutions to their problems.

Xpeedic will showcase its integrated RFIC solution, including IPD (Integrated passive devices), EDA software, and SiP (System in package) service within the exhibition. Xpeedic’s silicon-based IPD technology, including standard IPD library for cellular and WiFi applications and turn-key customized IPD design, delivering industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications. Xpeedic’s EDA software tools enables fast electromagnetic modeling and extraction, which helps customers to achieve shorter time to market for their products.

More details to see http://ediconchina.com/default.asp

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Xpeedic EDA Tools Selected to be in ICC EDA Platform

Shanghai, China. – December 24, 2015 – Xpeedic, a leading provider of EDA, IPD and SiP solution, today announced the partnership with Shanghai ICC (IC Industry Promotion Center).Xpeedic’s EDA flagship tools in high speed digital and RF IC designs are now part of ICC’s EDA service platform.

In order to promote the development of the IC design industry and to create a low-cost, low-risk design environment for the majority of design firms, ICC Shanghai has established an EDA software and hardware platform, providing SMEs with advanced software, hardware design verification environment, strict data security and sound technical support.

“On our platform, currently we only accommodate the software vendors with industry-proven and widely-adopted EDA solution such as the top three –Synopsys, Cadence and Mentor Graphics. The platform carefully selected two domestic EDA leaders and Xpeedic is one of them. It is for sure that cooperating with these EDA software companies, we will help more SMEs to adopt the world-leading solutions, ” said the leader at the ICC EDA platform.

“Rapidly growing data demand has driven the growth of mobile broadband, wifi, IoT, and cloud computing, fueling the development of network, devices, and applications. High speed communication link and RF front end designs, which directly contributes to the bandwidth of the data transmission, becomes more and more challenging because of the ever increasing data rate and frequency band allocation,” . said Dr. Ling, CEO of Xpeedic. ”Xpeedic’s RF IC and high speed SI solution provide a fast and accurate way to enable engineers to design with confidence, shorten the design cycle, and thus reduce the time to market. . With this partnership with ICC, we expect to help more domestic SMEs with the best tools and design the next generation electronic devices.

Xpeedic EDA modules included in ICC EDA platform are IRIS for RFIC passive extraction , SnpExpert for S-parameter exploration, ViaExpert for 3D Via Modeling and Simulation, and ChannelExpert for high speed channel exploration.

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Xpeedic Taiwan 2015 EDA Seminar is coming

Xpeedic Technology, Inc. will host an EDA seminar in Taipei, Taiwan on Oct.12, 2015.

High speed communication link design becomes more and more challenging because of the ever increasing data rate and the rapid development of semiconductor and IC technology. At multi-gigabit per second data rate, designers must characterize all the pieces in the signal path from transmit to receiver to address the signal integrity issues, including reflections, crosstalk, Simultaneous Switching Noise (SSN) and so on. Even a small discontinuity can significantly degrade the signal.

This seminar is targeting the SI engineers and to discuss fast and accurate way to model and simulate discontinuities along the path and optimize the channel performance. Xpeedic’s co-founder CEO Dr.Ling and VP engineering Dr. Dai will present within the seminar.

Detail agenda:

9:30-9:40 Welcome and Overview
9:40-10:10 S-parameter in high speed SI
10:10-10:40 Via modeling and optimization
10:40-11:00 Coffee/tea break
11:00-11:30 Impedance discontinuities from surface mounted pads
11:30-12:00 High speed channel modeling and optimization
12:00-13:00 Luck draw and Lunch

Venue: Conference center of National Taipei University of Technology
Contact: 02-2741-7655#201~202

If you have interest, please send email to Marketing@xpeedic.com for registration.

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EPEPS 2015

Date:Oct 25-28, 2015.
Location: San Jose, CA

Xpeedic to Exhibit at EPEPS 2015
EPEPS (Electrical Performance of Electronic Packaging and Systems) is the premier international conference on advanced and emerging issues in electrical modeling, analysis and design of electronic interconnections, packages and systems. It also focuses on new methodologies and design techniques for evaluating and ensuring signal, power and thermal integrity in high-speed designs.

Xpeedic will showcase its latest technology on EDA software, IPD and SiP solution. Xpeedic EDA software tools enables fast electromagnetic modeling and extraction. The IP on silicon integrated passive devices (IPD) delivers the industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications.

More details to see http://www.epeps.org/

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Xpeedic Secures Series-B Funding Led by SMIC Fortune-Tech Capital and Shanghai IOT Capital

Suzhou, China. – August 6, 2015 – Xpeedic, a leading provider of EDA, IPD, and SiP solution, today held a signing ceremony, to officially accept the joint investment from SMIC Fortune-Tech Capital and Shanghai IoT Capital.

“With high speed wireless telecommunication, especially 4G LTE network, continuing to evolve, the RF front end of mobile devices becomes more and more complicated, and poses tremendous challenges to IC designs. Compared to the discrete components, Xpeedic’s IPD technology has great advantages in miniaturization, high performance and low cost,” said Yuwang Sun, President of SMIC Fortune-Tech Capital, “In the last few years, Xpeedic has worked closely with SMIC and developed first-pass IPD design flow to enable quick IPD prototyping and volume product. We are very optimistic about Xpeedic’s growth in the next few years.”

Ms. Wang Xiaolei, the partner at Shanghai IoT Capital, said, “with the latest wave of IoT, we have seen many technology development in the space of smart devices in China market, however, most by those foreign companies. Xpeedic, with its home grown products in EDA and IPD, can deliver their solution with better performance and more importantly more tailored to Chinese customers.. We see a huge market ahead of us for Xpeedic.”

Mr. Yu Xiekang, the Vice Chairman of China Semiconductor Industry IC branch, said, “In the last few years, system miniaturization is a key challenge for semiconductor industry. Compared to SoC (System-on-Chip) solution, SiP provides a viable solution to enable integration of digital, analog, and RF blocks into one single package. We anticipate the wide adoption of Xpeedic’s SiP solution by the industry.”

Dr. Feng Ling, CEO of Xpeedic, said, “Xpeedic has made tremendous progress in developing industry leading EDA, IPD, and SiP solution since the start of the company in 2010. With this round of funding from the venture capitals with the resources in China’s semiconductor industry, we expect the even faster growth in the coming years.”

About Xpeedic
Xpeedic is a global leading provider of EDA software, IPD, and turn-key SiP design solution. The company is dedicated to help customers with high performance EDA tools and differentiating electronic design solution in the area of high speed digital designs, IC package designs, and RF analog mixed-signal designs. Their tools and solutions are widely adopted by the companies making smartphone, tablet, wearable devices and high speed data communication devices.
Founded in 2010, Xpeedic has offices in both US and China, Shanghai and Suzhou. For more information, please visit www.xpeedic.com.

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Xpeedic Announces Launch OF ChannelExpert Version 2015.01 for High Speed Channel Design

Shanghai, China. — July 13, 2015 —Xpeedic today unveils a new high speed channel design product: ChannelExpert Version 2015.01. ChannelExpert is a great addition to Xpeedic’s popular tools SnpExpert and ViaExpert. They provide SI engineers a better and efficient way to design today’s high speed digital circuitries.

High speed channel design is becoming more and more challenging because of the ever increasing data rate. At multi-gigabit per second data rate, channel designers must characterize all the pieces in the signal path from transmitter to receiver including connector, via, and trace, which are typically represented by either S-parameter blocks or RLGC transmission line (TML) model. Conventional SPICE-like circuit simulator has difficulty to efficiently handle the channel with mixed S-parameter and TML models, especially with large number of ports.

ChannelExpert provides a fast and accurate way to address the signal integrity issue arising from the cascaded network of S-parameter blocks and TML models. Its frequency domain cascading technology and 2D RLCG full wave transmission line solver enable quick and accurate channel simulation. Its intuitive graphic interface lets you easily design, analyze and optimize your high speed serial links for compliance with design standards.

“After the successful launch of first two tools, SnpExpert for S-parameter Exploration and ViaExpert for Via Modeling and Simulation, we are very excited to release ChannelExpert within our high speed signal integrity suite” said Dr. Feng Ling, CEO of Xpeedic. “With the increasing demand for more automated design flow, engineers feel that the traditional SI tools could not meet their goal in terms of efficiency and productivity. Xpeedic’s mission is to develop innovative tools and help engineers to break the technology barriers to design next generation electronic devices.”

Other highlights of ChannelExpert Version 2015.01 include:

  • Easy multiple channel creation by table with only one-click
  • Built-in substrate and stackup databases
  • Parametric S-Parameter and transmission line physical parameters for easy channel exploration
  • Integrate SnpExpert into ChannlExpert seamlessly to automate compliance check for popular standards like OIF CEI,IEEE 802.3 and others.

About Xpeedic
Xpeedic Technology, Inc. is a global leading provider of EDA software, IPD, and turn-key SiP design solution. The company is dedicated to help IC design customers with high performance EDA tools and differentiating electronic design service, including high speed digital designs, IC package designs, and RF analog mixed-signal designs. These tools and solutions are widely adopted by Smartphone, tablet, wearable devices and high speed data communication devices.
Founded in 2010, Xpeedic has offices in both US and China, Shanghai and Suzhou. For more information, please visit www.xpeedic.com.

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ICCAD 2014

Date:Dec. 11-12, 2014.

Location: Hong Kong

Xpeedic Technology, Inc. will exhibit at CSIA-ICCAD 2014 Annual Conference at Hong Kong on Dec. 11-12, 2014.
At Dec 12, Dr.Wenliang Dai, Engineering VP, will present the leading design method-“RFSiP Miniaturization by Integrated Passive Devices(IPD)” with IC industry companion in ICCAD Subject Forum 3.
At booth 1F#21-22,Xpeedic will showcase their high speed signal integrity (SI) solution and RF front end miniaturization solution in the conference. Their fast and accurate SI software enables the quick way to simulate the high speed channel for both pre-layout and post-layout scenarios.Their IP on silicon integrated passive devices (IPD) delivers the industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications.

The conference official  website:
http://www.csia-iccad.net.cn/
http://www.cicmag.com/bbx/856303-856303.html

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Asian IBIS Summit (Shanghai)

Data:  Friday, Nov. 14, 2014.
Location:  Parkyard Hotel Shanghai, 699 Bibo Road, Zhangjiang Hi-Tech Park, Shanghai 201203, P.R. China

Xpeedic Technology, Inc. will participate the Asian IBIS Summit (Shanghai) on Nov. 14, 2014. Dr. Wenliang Dai, VP of Engineering of Xpeedic Technology, Inc.,  will deliver the following speech.
Paper:     Connector Via Footprint Optimization for 25Gbps Channel Design
Authors:  Wenliang Dai and Zhouxiang Su
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Xpeedic Announces Release of SnpExpert and ViaExpert 2014.02

Suzhou, China. —Sep. 30, 2014 —Xpeedic today unveils two enhanced solution in the area of high speed signal integrity: SnpExpert and ViaExpert version 2014.02.

SnpExpert enables SI engineers to quickly explore the S-parameters in both frequency domain and time domain. SnpExpert 2014.02 solution provides quick single-ended and differential pair plot with PLTS style, enhanced TDR plot and built-in delay and skew calculator,  improved  S-parameter passivity/causality/reciprocity/stability analyzer,  built-in IEEE and OIF compliance, customized report generator in Word/PPT/Html format and one-click-for-all template plot

ViaExpert enables fast and accurate via modeling and simulation. In the latest release of ViaExpert, both 3D FEM solver and fast hybrid solver are deployed to achieve fast and accurate simulation.  In addition, ViaExpert 2014.02 release provides enhanced multi-core simulation performance, improved built-in connector footprint database, via array template, SMA model for quick pre-layout analysis and Allegro brd import for post-layout analysis. The customized parametric analysis is also supported in the new release.