Samsung SAFE Foundry Forum 2019 – San Jose

Date: Oct 17, 2019

Place: San Jose, CA

As Samsung Advanced Foundry Ecosystem (SAFE™) partner, Xpeedic will be exhibiting at Samsung Foundry Forum at the San Jose, CA on Oct 17, 2019.

Featured as in-booth demos will include

  • IRIS, Virtuoso-integrated EM simulation tool

Certified on Samsung’s advanced process nodes including its FD-SOI 28FDS and 14nm FinFET node

  • Metis, IC-package co-simulation tool

IC-package co-simulation tool to enable system-in-package designs. It also supports advanced packaging technologies such as 2.5D interposer with TSV.


See the event details here.


Xpeedic to Exhibit at IMS2019

Date: June 2-7, 2019

Place: Boston, US

Booth#: 210

Xpeedic Technology will showcase its latest solutions at the 2019 IEEE MTT-S International Microwave Symposium (IMS) in Boston Convention & Exhibition Center, June 2-7.

Featured as in-booth demos will include

  • IRIS, Virtuoso-integrated EM simulation tool with the state-of-the-art 3D planar solver

Certified on multiple foundries’ advanced process nodes and proven on RF IC designs including 5G mmWave.

  • Metis, IC-package co-simulation tool

IC-package co-simulation tool to enable system-in-package designs. It also supports advanced packaging technologies such as 2.5D interposer with TSV.

  • IPD for RF FE module design

Advanced IPD technology to enable passive integration for RF front end, helping customers to achieve faster design convergence from spec to volume production.

  • Through Glass Via (TGV) solution in collaboration with Corning

Through Glass Via technology has become a promising technology candidate to realize integrated, low cost and high performance passive devices. A diplexer built with TGV shows less in-band insertion loss and greater out-of-band rejection yet still compact size.

Xpeedic will also present at IMS MicroApps Theatre

* Title: Integrated Passive Devices (IPD) for RF Front End Integration (WEMA35)

* Time: June 5, 12:30-12:45

See the event details here.



Xpeedic to Exhibit at DAC2019

Date: June 2-6, 2019

Place: Las Vegas, NV, US


Xpeedic Technology will showcase its latest solutions at the 2019 Design Automation Conference (DAC) in Las Vegas, June 2-6.

Xpeedic 5G solution enables designers inSoC, RFIC, packaging, board to build better 5G systems with theirdifferentiating technologies. It includes the following highlights:


5G RFIC in Advanced Process Nodes
  • IRIS,Virtuoso-integrated EM simulation tool with the state-of-the-art 3D planar solver, certified on multiple foundries’ advanced process nodes and proven on RF IC designs including 5G mmWave.

IC-Package Co-design for 5G Application
  • Metis,IC-package co-simulation tool to enable 5G system-in-package designs, and supports advanced packaging technologies for CPU, GPU, network processor, FPGA designs to enable artificial intelligence applications in 5G era.

Integrated Passive Devices for 5G NR
  • RF front end module has become more and more complicated with mobile technology evolving from 2G, 3G, 4G to 5G. Increasing number of bands, carrier aggregation, and MIMO demand more filters and more integration in RF front end. Integrated passive devices (IPD) provide great advantages of miniaturization, high consistency, low cost and high integration over discrete. Xpeedic has partnered with industry leading IPD foundries with both silicon and glass substrates. With the extensive IPD design experience,Xpeedic helps customers to choose the right technology to meet their spec.

More details to see here.


Xpeedic to Exhibit at WSC2019









EDA Enablement for RF- and FD-SOI

  • SOI论坛
  • 5/18 15:55
  • CEO 凌峰博士


  • EDA/IP设计服务论坛
  • 5/18 16:00
  • 副总裁 代文亮博士




MWC 2019

一年一度的 MWC 世界移动通信展会2/25-2/28在巴塞罗那如火如荼的举行。这期间,各大厂商们“蓄谋已久”的年度大招频出,这些技术将对如今越来越同质化的手机通信市场带来耳目一新的新鲜元素,并引领整个行业革新和创新趋势。微信图片_20190227101147

特殊玻璃行业的全球领导厂商康宁公司联合芯禾科技,在本次大会上发布了针对5G射频前端模组和Wifi应用的玻璃通孔(ThroughGlass Vias, TGV)解决方案。







如果您在MWC现场,我们非常欢迎您至康宁公司展位(Hall 2 Executive Meeting Rooms, Upper Level, Room #2G9Ex)了解详情


Xpeedic’s IRIS Qualified on GLOBALFOUNDRIES 12LP Process for High-Performance Applications

Cupertino, CA. — Feb 20, 2019 —Xpeedic Technology, Inc. today announced that its 3D full-wave electromagnetic (EM) simulation tool, IRIS, has been qualified on GLOBALFOUNDRIES’ 12nm Leading-Performance (12LP) process technology. This qualification enables designers to run IRIS with confidence using the certified IRIS process file available on GF’s 12LP FinFET semiconductor manufacturing process.

GF’s 12LP technology provides as much as a 10 percent improvement in logic circuit density and more than a 15 percent improvement in performance over 14nm FinFET solutions, satisfying the processing needs of the most demanding compute-intensive applications from artificial intelligence and virtual reality to high-end smartphones and networking infrastructure.

“Accurate EM simulation tools are critical for successful first design pass for our clients’ compute-intensive applications,” said Richard Trihy, vice president, Design Enablement at GF. “The qualification of Xpeedic’s EM tool provides designers predictable EM simulation results for advanced process technologies.”

“We are very pleased that IRIS is able to achieve excellent correlation with measurement and thus qualified for GF’s 12LP process,” said Dr. Feng Ling, CEO of Xpeedic Technology, “As GF FDXcelerator and RFwave member, Xpeedic will continue the collaboration with GF on various process technologies to help our mutual clients with innovative solutions and services.”

The electromagnetic qualification program by GF ensures that every EM tool qualified by the program meets GF’s highest quality standards. With this qualification, IC designers can choose their preferred EM simulation tool, and its corresponding process file, to ensure their design confidence and reduce time-to-market.

ICCAD 2018

Xpeedic to Exhibit at ICCAD 2018

Date: Nov.29-30, 2018

Location: Zhuhai, China

Booth#: 003-004

Xpeedic Technology, Inc. will exhibit at CSIA-ICCAD 2018 Annual Conference & Zhuhai IC Industry Innovation and Development Summit (ICCAD 2018) in Zhuhai on Nov.29-30, 2018.

ICCAD is a most important annual event for IC design industry in China. It creates a biggest platform for enterprises within China IC industry chain to exchange their expertise and to build up networks. This year, the theme is “Linking Core Power, Leading intelligence of the Great Bay Area”. In this annual general meeting, the Integrated Circuit industry, especially the opportunities and challenges faced by the IC Design industry, will be discussed in details in order to enhance innovation capability and improve the comprehensive capability of Chinese Integrated Circuit industrial chain, thereby satisfying the market demands and boosting international competence.

At booth 003-004 , Xpeedic will showcase their latest update in RF front end miniaturization solution and high speed signal integrity (SI) solution in the conference. Their IP on silicon integrated passive devices (IPD) delivers the industry-leading combination of performance and integration to enable system-in-package (SiP) for a broad range of applications. Their fast and accurate SI software enables the quick way to simulate the high speed channel for both pre-layout and post-layout scenarios.

Dr. Wenliang Dai, co-founder, VP Engineering, will also present the leading design method “Addressing Modeling and Simulation Challenges for IC, Package and System” within EDA and IC Design Service forum on Nov.30.

For more details, please click here.