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Automated Crosstalk Scan, Impedance Scan and DRC+ for Signal Integrity Signoff

Crosstalk analysis for high speed PCB design becomes more and more important due to the high data rate and tightly coupled routing. Traditional circuit-based analysis can not meet the accuracy demand. Three-dimensional (3D) full-wave electromagnetic solver is required to capture the complex 3D PCB environment and the frequency-dependent phenomena. This paper introduces a novel hybrid solver technology with both speed and accuracy. Crosstalk metrics to quantify the crosstalk level are also developed by post-processing S-parameter. Combining these two techniques allows designer to achieve full board crosstalk in a few hours as planned, which significantly reduces the post-layout check time and ensure timely sign-off.

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Fast and Accurate Fiber Weave Modeling and Simulation

As the data rate of SerDes channel increases from 25Gbps to 56Gbps and 112Gbps, the requirement for timing skew of differential signals is becoming tighter and tighter. The skew of differential pairs can be introduced by the unbalanced differential trace routing on glass weaves. In high-speed PCB designs, there are many possible combinations considering different glass weave patterns and different trace routings, which makes quantifying the impact of glass weave on skew a challenging task. It requires electromagnetic simulation tool vendor to come up with the design guideline for PCB engineers.

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Accurate Dk/Df Extraction for High-speed SI Applications

This application note presents an accurate way to perform dielectric constant (Dk) and dielectric loss (Df) extraction over a wide range of laminate materials for high-speed SI applications. The Through-Only De-embedding (TOD) method with optimization is used for this Dk/Df extraction. The resultant frequency dependent material models is ready to be used in electromagnetic simulation tools in market.

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IEEE P370 Compatible De-embedding and Quality Check for Measured S-parameters up to 50Ghz

This application note presents an IEEE P370 compatible and competitive de-embedding and quality check method for measured S-parameters up to 50Ghz in SnpExpert, which gives SI engineers a fast and easy way to post-process and assess S-parameters.

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Combined IRIS-HFSS Flow for Passive Modeling and Verification in TowerJazz RF and HPA Nodes

This application note presents a combined IRIS-HFSS flow for passive modeling and verification in TowerJazz RF and HPA nodes, which gives IC designers not only the fast and accurate passive modeling and synthesis capability at the design stage, but also the verification capability at the sign-off stage.

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Full Board

Fast Full Board Crosstalk Scan for Signal Integrity Sign-Off for High Speed PCB Designs

Abstract—Crosstalk analysis for high speed PCB design becomes more and more important due to the high data rate and tightly coupled routing. Traditional circuit-based analysis can not meet the accuracy demand. Three-dimensional (3D) full-wave electromagnetic solver is required to capture the complex 3D PCB environment and the frequency-dependent phenomena. However it is prohibitively expensive to simulate the practical large board cases and the resultant tabulated S-parameter cannot be directly used to quantify the crosstalk level. This paper introduces a novel hybrid solver techniques with improved speed and accuracy. The new crosstalk metrics to quantify the crosstalk level are also developed by post-processing S-parameter. Combining these two techniques allows designers to achieve full board crosstalk in a few hours as planned intended with using the tool, which significantly reduces the post-layout review time, allows layout optimization and ensures a timely sign-off.

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Foamed Cable

An Empirical Model for Foamed High-Speed Cable

Abstract—As the foaming technology becoming widely adopted for high-speed cable, the challenge of modeling the generic foaming which is a combination of skin and foam structure becomes critical for both cable design and channel analysis. An empirical model is proposed and validation with measurements are presented in this paper for targeted applications.

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Integrating IRIS Plus in Nuhertz FilterSolutions to Enable Fast Filter Design

This application note presents a fast filter design flow by taking advantage of both the filter synthesis from Nuhertz FilterSolutions and the 3D full-wave electromagnetic simulation from Xpeedic IRIS Plus. The combined flow offers designers a single flow for fast filter prototyping without manually transferring CAD data from layout to EM simulation, thus improving the design efficiency.

Introduction

Radio-frequency (RF)/microwave filter is an important component in a high-frequency system. Designing such a filter for given performance specifications is often a tedious and iterative process.

Nuhertz FilterSolutions provides a quick and accurate approach for filter synthesis and analysis. It supports various filter topologies including distributed filters built on microstrip, stripline, or suspended substrate. However, the high frequency characteristics such as parasitic effect are not considered. Adding Xpeedic IRIS Plus, a 3D full-wave electromagnetic solver, into the flow can address this problem.

It is the purpose of this application note to demonstrate the advantages of combining circuit-based synthesis with EM-based simulation in RF/microwave filter design. Figure 1 shows the combined Nuhertz-Xpeedic flow to enable fast filter prototyping.

AN106_1

Figure 1 Diagram showing the combined Nuhertz-Xpeedic flow.

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Combined IRIS-HFSS Flow for Passive Modeling and Verification in Advanced Process Nodes

This application note presents a combined IRIS-HFSS flow for passive modeling and verification in advanced process nodes, which gives IC designers not only the fast and accurate passive modeling and synthesis capability at the design stage, but also the verification capability at the sign-off stage.

Introduction

Electromagnetic simulation of passives and interconnects becomes challenging for IC designers in advanced process nodes. First, an integrated environment is required in which EM simulation tool is seamlessly integrated within the design platform. Second, fast passive modeling and synthesis is needed at the design stage. Third, the very accurate three dimensional EM simulation is desired for sign-off or IC-package co-simulation.

In this application note, a combined IRIS-HFSS flow seamlessly integrated in Cadence Virtuoso platform is demonstrated, as shown in Figure 1. At the design stage, IRIS and iModeler enable fast passive modeling and synthesis with its accelerated Method of Moments (MoM) solver engine and artificial neural network(ANN) technique. At the verification stage, HFSS enables accurate 3D simulation and possible IC-package co-simulation.

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Figure 1 Combined IRIS-HFSS flow for IC designers.

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Through Glass Via (TGV) Based Integrated Passive Device Technology for RF Front End Design

This white paper presents a comprehensive study on TGV based integrated passive devices (IPD) in the context of comparing with other IPD technologies such as low-temperature-cofired-ceramics (LTCC), high resistivity silicon (HRSi), and glass substrate. The comparison is not only on the component (inductor) level but also on the system level, where a carrier aggregation diplexer is designed. Further TGV process improvement is also suggested based on the study.

Introducion

Mobile and IoT device market has experienced tremendous growth in the past. While Moore’s law continues to drive the technology to shrink for the digital portion of the devices, the RF portion does not scale in the same rate. The further reduction in cost and size comes from the passive integration. To meet the ever growing demand reduce size and cost, increase functionality, integrated passive device (IPD) technology has become a viable technology for RF front end designs. It has evolved from low-temperature cofired ceramics (LTCC) to thin-film technologies such as the one using high-resistivity silicon (HRSi) or glass substrate.

Recently, Through Glass Via (TGV) technology has become a promising technology candidate to realize integrated, low cost and high performance passive devices. Three-dimensional solenoid inductors can be constructed with TGVs for better quality-factor compared with 2D planar inductors. Glass’s lower dielectric constant and higher resistivity compared to silicon lead to better high frequency performance. Passive devices such as filters and diplexers built with TGV can have less in-band insertion loss and greater out-of-band rejection yet still compact size.

This white paper will demonstrate the TGV performance by comparing TGV inductor with those built on LTCC, HRSi, and glass substrate. The similar comparison is also carried out on system level. A carrier aggregation (CA) diplexer is designed with TGV, LTCC, HRSi and glass, respectively. Their performance such as IL, isolation, and attenuation is compared. Further improvement on TGV performance is studied from the TGV process perspective.

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