Xpeedic today announced that Norio Nakajima, President of Murata Manufacturing Co., Ltd., led a senior delegation to visit Xpeedic’s Shanghai headquarters. The two companies reached key agreements to deepen strategic collaboration and jointly accelerate system-level innovation for AI-era computing infrastructure.

Industry Transformation:

From “Point Optimization” to “System-Level Synergy”

The latest wave of technological innovation, driven by large-scale models and generative AI, is rapidly raising requirements for computing infrastructure—demanding higher bandwidth, lower latency, greater energy efficiency, and enhanced reliability.

The traditional sequential design approach—designing chips first, selecting components next, and tuning the system last—is no longer sufficient to address the systemic challenges of signal integrity (SI), power integrity (PI), and electromagnetic interference (EMI) in AI systems.

Components are no longer isolated items in a BOM; they have become critical variables within system architecture. Performance bottlenecks are shifting from individual chips to system-level integration, making System Technology Co-Optimization (STCO) a key direction for the industry.

As a leading provider of system-level EDA, Xpeedic has long focused on innovation in electromagnetics, multi-physics, and system-level simulation technologies. The company has built a unified simulation platform spanning chips, advanced packaging, PCBs, and full systems—extending design boundaries from individual chips to entire system architectures, and providing critical STCO support for high-performance computing in the AI era.

Murata is a global leader in electronic components, with deep expertise in MLCCs, RF modules, and EMI suppression technologies. Its products play a critical role in ensuring stable operation and performance optimization in high-performance computing and high-speed communication systems. 

Murata has already established collaboration with Xpeedic by providing encrypted component models based on Xpeedic’s Hermes simulation platform to leading global customers. This initiative demonstrates proven compatibility between advanced EDA tools and real-world components technologies.

Following in-depth discussions, the two companies reached two key areas of consensus and outlined four areas of ecosystem collaboration.

Core Consensus: Accelerating the shift to system-level design

Full-stack collaboration is essential

In AI-driven ultra-high-speed interconnect scenarios, chips, packaging, and systems are tightly electromagnetically coupled. Any fragmented design approach can lead to system-level failures.

Models are strategic assets

High-accuracy component models are the foundation of system simulation. Seamless integration between EDA tools and component models is critical to improving design efficiency and mitigating physical risks.

Strategic Collaboration: Four Pillars of Ecosystem Development

• Joint system-level solutions for next-generation AI and high-performance computing applications 
• Deeper integration of high-precision component models with simulation platforms to improve design accuracy and efficiency 
• Co-engagement with global customers, spanning chip design through system integration 
• Global ecosystem and brand collaboration to promote system-level design innovation

Enabling a More Predictable Future for AI Hardware

This collaboration reflects a shared commitment to enabling a shift from chip-level to system-level optimization, delivering more reliable and efficient solutions for next-generation computing infrastructure.