Overview

Xpeedic’s Genesis electronic system design platform includes XSCH, XPKG, XPCB , XLIB modules. Based on the concept of simulation-driven design, Genesis integrates Xpeedic’s simulation capabilities, assists the collaborative analysis of pre-middle-post-design stages, and advances the identification and resolution of multi-physics problems such as circuit, of the unified electromagnetic, power and thermal field to the early stage of design. It realizes the success solution of system design and simulation, and improves the efficiency of product research and development.

Genesis XPCB is mainly used for layout design of various printed circuit boards, such as layout placement and routing. Users initialize the design rules according to the logical netlist derived from the schematic design output and the DXF structure element diagram* defined by the board frame. The power / ground shape is connected with copper, and the physical interconnection is correctly realized according to the design rules such as electrical characteristics and physical spacing. For typical scenarios, users can conduct automatic layout placement and routing. Design rule checking is carried out through design rules within different domains while post-simulation is used to ensure no signal / power integrity risks. Finally, the documents for manufacturing like light drawing and drilling are output from the optimal design.

Key Features

• PCB project library and design management: Support complete PCB project management functions, including functionality module entry, project data loading and backup, project library management module, project configuration and resource filtering / retrieval. Users can effectively manage input and output data resources for various types of board level design projects to realize the efficient cooperation of each function module.

• Efficient schematic and layout collaboration: Support schematic netlist synchronization and device paging layout. Based on the bidirectional highlighting, positioning and synchronous jump functions of interconnection networks / devices, users can improve the efficiency of batch selection, movement, layout, inspection and other collaborative operations.

• Easy object positioning and hidden management: Support multi-dimensional filter switch and selection positioning functions in terms of layer, category, network and device. By clicking the switch of hierarchical classification objects, it is convenient for users to find and locate conductive and non-conductive layer objects, which greatly improves the efficiency of interactive design.

• Automatic placement based on device grouping and priority: Support the setting and synchronization for device placement with priority attributes, and manual / automatic placement according to different types of devices. It supports users to implement system components, BGA, resistor, capacitor, inductor and other devices. In typical scenarios such as radio frequency and power supply, it can automatically realize pre-layout within one step.

• Flexible interactive routing and pushing modes: Based on the different scale of single, differential, Bus and interconnection network rules, interactive routing is carried out through highlighting, pushing and close modes in order to optimize the routing.

• Complete board-level design rule manager and DRC: Support the layer stack setting and the rule management of electrical, physical and spacing through the rule manager. Users can manually create equal-length groups based on interconnection networks and PinPair, and finish equal-length winding and equal-length analysis functions manually. It has the function of design rule checking (DRC) and positioning according to relative rules.

• Co-simulation and data support: Support the unified data format of Xpeedic’s internal simulation platform. Users can quickly conduct the power DC analysis within the same design. The design files are imported into the internal and external simulation platforms through ODB++, IPC-2581 and other standard formats to complete the signal integrity and electro-thermal co-simulation, so as to finally realize the simulation-driven design. In addition, the optimal simulation result is output into various electrical topology rule files and sorted into the library for cross-design reuse.