High speed power and signal analysis is becoming more and more challenging because of the ever-increasing data rate and decreasing routing area. As operation power voltage continue drops, and current increases, power integrity analysis is a key to insure the quality of electronic products.
Also, more and more signals need to be analyzed during design, such as quickly analysis for signal quality and modeling for high-speed signal interconnects on the premise of ensuring quality, it is the pressure for electronic engineer.
Hermes PSI is suitable platform for board/package power and signal joint simulation. It is planned for quickly power DC/AC analysis, decap optimization, signal topology extraction and analysis and signal interconnect modeling, which can help designers easily analyze and design qualified power system and signal interconnects for electronic products.
The first launched feature for Hermes PSI is power DC analysis. It can import common PCB/Package design files, such as BRD, MCM, ODB + + and ASC files; The DC analysis flow in Hermes PSI can help users analyze DC effects of power supply to check the DC voltage drop, current and current density distribution, etc.. The simulation is flow-based format. Currently, it supports single-phase, multi-phase VRM settings and simulation, and can support sense settings in VRM; A variety of SINK configurations are suitable for different scenarios, such as automatic and manual settings; After simulation, DC voltage drop of SINKs is reported, and judges whether the power supply meets the defined specification requirements; It can also output corresponding voltage drop, current density and power density nephogram. With layout based color map display and hotspot indication, users can conveniently view the potential issues.
Support common PCB/Package design data, such as BRD, MCM, ODB + + and ASC files;
Support short/open checking
Support various VRM and Sink settings to meet any power supply and current consumption applications
Support sense location settings for VRM
Support 2D voltage drop/current density/power density distribution color map display, and with hotspot indications.
Result table for Sink over-voltage/under-voltage values, margins, voltage drop at each pin, via current and wirebond current. It also can be exported to excel file.
Generate spice netlist for PDN resistance network
Support Thermal Influence for metal conductivity
Flow-based step-by-step operations, and settings can be re-used
Support sense line optimization function
Support multi-board and Chip-Package-PCB co-simulation for DC analysis
Support wirebond structure
Report generation for design info, settings, results, color map display with word format.
Support Python script for automatic power DC analysis