Background

In 5G communication, for the entire RF system chain, the parasitic inductance of the encapsulated bonding wire, the pad of the C4 bump, and the pads and solder balls at the junctions of the packages and PCBs, as well as the impedance of the traces, all significantly impact the passive RF indicators. Excessive parasitic inductance and capacitance can lead to impedance deviation. Even though impedance can be corrected through a matching circuit, this will sacrifice a certain amount of the system's bandwidth and in-band flatness. The operating frequency of 5G millimeter waves is several times higher than that of Sub-6G, making the impact of parasitic parameters on RF performance especially prominent, resulting in a significant deviation of the RF circuit performance built by PCB microstrip lines from theoretical calculations. To meet the high throughput requirements, 5G communication products need to support multi-band combinations, making the RF system architecture increasingly complex. This leads to a doubling in the number of matching components that need to be adjusted, and more dense PCB traces, making the continuity and isolation of trace impedance a risk point in PCB layout. Additionally, after PCB reflow, engineers need to undertake extensive debugging work, leading to greater manpower costs and longer R&D and debugging cycles.

Solution

Xpeedic RF solutions mainly include on-chip passive device EM simulation and extraction tool IRIS, PDK model generation tool iModeler, and RF design and simulation platform XDS, etc.

IRIS supports on-chip passive modeling and simulation for RFIC design. With its accelerated 3D EM solver, advanced process support, and seamless integration with Virtuoso, it helps RFIC designers in achieving successful silicon implementation on their first design attempt.

iModeler is embedded with various RF and high-speed passive device templates. It uses a high-precision, accelerated EM solver combined with neural network-trained algorithms, allowing for the rapid development of parametric models based on specific process PDK layouts and their equivalent circuits.

XDS offers a comprehensive RF system solution, from chips to packaging to PCBs. It supports EM extraction across the entire full-link and multi-scale models, and is equipped with built-in cascade algorithms and spice simulators, featuring field-circuit co-simulation capabilities. Along with various advanced analyses, XDS enables designers to iterate at the system level directly based on system indicators, thereby controlling the entire design process. XDS also includes various RF devices and behavioral-level models, including management of third-party device libraries, making RF system design more intuitive and efficient.