Austin, TX, June 21, 2017 – Xpeedic Technology Inc. was chosen by Gary Smith EDA as a What to See at DAC company at the 54th Design Automation Conference.

https://www.garysmitheda.com/wp-content/uploads/2017/06/What2SeeDAC2017.pdf

Who:

Xpeedic is a global leading provider of EDA software, Integrated Passive Device (IPD), and System-in-Package (SiP) design solution. The analog/mixed-signal IC software tools help IC engineers to shorten their design cycle at the latest advanced semiconductor nodes. The signal integrity software tools enable faster design closure for IC package and PCB system designs. The growing IP portfolio on IPD delivers the industry-leading combination of performance and integration to enable SiP for RF front end module designs. All these tools and solutions have been widely adopted by companies who make mobile and IoT devices, computing and network systems.

What:

Xpeedic RFIC solution is Xpeedic’s flagship product tailored to RFIC applications, which  includes RFIC passive extraction tool IRIS, fast PDK model generation tool iModeler and RF passive PDK verification tool iVerifier.

• IRIS 2017 provides a 3D fast EM simulation tool integrated in Cadence Virtuoso design flow. The fast 3D method of moments solver with both multi-core and distributed parallelization greatly reduces the EM simulation time thus improves the design efficiency. The seamless integration with Virtuoso not only enables designers to stay in the Cadence design environment to perform the EM simulation which avoids the manual and error-prone layout data conversion, but also realizes the perfect convergence to front-end for design verification by automatic back-annotation. This design flow will greatly help RF IC designers to reduce the design cycles and achieve first-pass silicon success.
  
  

• IRIS Plus is based on the industry leading acceleration technology for multilayer structures,and enables fast and accurate 3D EM simulation of passive devices and interconnects for RF/microwave ICs, modules, packages, and circuit boards in Windows environment; fully supports 2.5D interposer SI and PI simulation flow.
  
  

When/Where:

Design Automation Conference (DAC), Austin, US, June 18-22, Xpeedic Booth #1923.