As Samsung Advanced Foundry Ecosystem (SAFE™) partner, Xpeedic will be exhibiting at Samsung Foundry Forum & SAFE™ Forum 2023 US , June 27th-28th.
At the Samsung Foundry Forum, participants can gain insight on our vision and latest technology innovations, hear from top technical experts as well as an industry guest speaker.
At the SAFE Forum, participants can hear about industry trends and learn from Samsung SAFE partners as they present solutions to EDA, IP, DSP, and Packaging challenges, gain insight on advanced technology and design infrastructure, learn advanced design solutions for HPC and automotive. At the Partner Pavilion ,through discussions and collaborations with the SAFE™ partners, participants can broaden insights on industry trends and innovative technologies.
Metis — SI/PI analysis for advanced packaging
Metis provides a comprehensive SI/PI/multi-physics analysis solution for 2.5D/3DIC advanced packaging chiplets designs, supporting mainstream advanced packaging processes including Samsung I-Cube, H-Cube, R-Cube, and X-Cube.
The Metis platform's multi-scale capability and capacity advantage enables unified EM simulation of die, interposer, and substrate without resorting to an error-prone cut-and-stitch approach used by legacy electronic design automation (EDA) tools. Its multi-mode option offers engineers a choice of speed and accuracy to cover design phases from architectural exploration to sign-off.
Metis won the 2023 3D InCites Herb Reiter Design Tool Provider of the Year Award.
IRIS — On-chip passive modeling and simulation for advanced process nodes
Xpeedic's RF EDA Design Platform includes XDS, Xpeedic’s RF system-level design and simulation platform, IRIS, its on-chip passive modeling and simulation tool, and iModeler, a passive model generation tool.
IRIS has been certified on Samsung's advanced process nodes including its 8nm/14nm LPP FinFET nodes, FD-SOI 28FDS. With accelerated 3D EM solver, advanced process support, and seamless integration with Virtuoso, IRIS helps RFIC designers achieve a design success on silicon experience Just on the first try.