Samsung SFF&SAFE™ Forum 2024 KR


Time:July 9

PlaceCOEX Auditorium, Korea



As Samsung Advanced Foundry Ecosystem (SAFE™) partner, Xpeedic will be exhibiting at Samsung Foundry Forum & SAFE™ Forum 2024 KR, July 9,2024.

At the Samsung Foundry Forum, participants can gain insight on our vision and latest technology innovations, hear from top technical experts as well as an industry guest speaker.

At the SAFE Forum, participants can hear about industry trends and learn from Samsung SAFE partners as they present solutions to EDA, IP, DSP, and Packaging challenges, gain insight on advanced technology and design infrastructure, learn advanced design solutions for HPC and automotive. At the Partner Pavilion ,through discussions and collaborations with the SAFE™ partners, participants can broaden insights on industry trends and innovative technologies.

Booth Highlights(Sector05)


Metis——SI/PI simulation platform for advanced 2.5 and 3D ICs

  • Metis is a SI/PI simulation that can easily achieve parameterized pre-simulation functionality based on Interposer and transmission line templates. It also supports SI/PI and circuit co-analysis workflows for 2.5D and 3D IC packaging.

Metis 2024 introduces a new high-speed circuit simulation flow with an embedded XSPICE circuit engine, making it convenient for users to evaluate the time-domain metrics. It also features a new PI DC flow for rapid assessment of voltage drop and current density hotspots and distribution maps across entire chiplet and 3D IC designs. Additionally, it optimizes the full-wave simulation flow for DDR5 packaging, achieving a 10x acceleration while maintaining comparable accuracy to those from competitors.



IRIS — On-chip passive modeling and simulation for advanced process nodes

  • Xpeedic's RF EDA Design Platform includes XDS, Xpeedic's RF system-level design and simulation platform, IRIS, its on-chip passive modeling and simulation tool, and iModeler, a passive model generation tool.

  • IRIS has been certified on Samsung's advanced process nodes including its 8nm/14nm LPP FinFET nodes, FD-SOI 28FDS. With accelerated 3D EM solver, advanced process support, and seamless integration with Virtuoso, IRIS helps RFIC designers achieve a design success on silicon experience Just on the first try.



July 9

COEX Auditorium, Korea