Xpeedic DesignCon2019 SI技能秀
尊敬的工程师伙伴,
我们盛情邀请您参加本月底芯和半导体在美国Santa Clara 2019年DesignCon展会上现场举行的高速SI技能秀活动。
我们一共准备了八大热门话题,由业内专家现场为您演示并互动讨论。所有参加者,皆有机会获得芯和半导体为您准备的新年礼物一份。
Signal Integrity Demo Highlights
IEEE P370 compatible de-embedding and quality check for measured S-parameters up to 50GHz
Through-Only De-embedding (TOD) and optimization based Dk/Df extraction for high-speed and wideband applications
Quick via modeling and optimization from connector footprint
Fast SI/PI simulation of 2.5D interposer with TSV
Fast and accurate fiber weave modeling and simulation
Automated crosstalk scan, impedance scan and DRC+ for signal integrity signoff
Automated full channel crosstalk analysis and design margin evaluation for high speed backplane systems
Web-based passive model management for SI/PI engineers
MEET US AT
DesignCon2019 | Booth 525
2019
1月29-31日