DesignCon 2025
Time:Jan 28-30
Place:Santa Clara Convention Center, Santa Clara, CA
Booth: #627
Overview
Xpeedic will showcase its latest simulation EDA solutions at DesignCon2025 in Santa Clara, Jan 28-30.
Xpeedic's simulation EDA from chip to system covers chip, package, module, PCB, interconnection and system. In particular, Xpeedic will focus on its high speed digital SI/PI analysis and 2.5D/3D Chiplet Advanced Packaging.
Technical Session
Xpeedic will co-publish two papers at DesignCon2025. Details are as follows:
Study of TDR Impedance & Loss Based on Modified Cannon-Ball Huray Roughness Model on a 1.6Tbps Optical Module PCB
Track: 04. Advances in Materials & Processing for PCBs, Modules & Packages
Author: Rongyao Tang, Shengyao Wan (Fiberhome), Rui Wang (Xpeedic), Zhi Li(Shennan Circuits)
Time: January 29, 11:15AM-12:00PM Pacific Time
Location: Ballroom E
Fast Design & Simulation of Photonics Computing Chip Base on Chiplet-Based Heterogeneous Integration
Track: 01. Signal & Power Integrity for Single-Multi Die, Interposer & Packaging
Time: January 29, 2:00PM-2:45PM Pacific Time
Location: Ballroom B
Resources Downloads
Click the images above to download files
Meet with Xpeedic
We would love to see you there and discuss how our solutions can support you.
Please signup if you can attend:
Wednesday, January 29, 11:00 a.m. - 6:00 p.m.
Thursday, January 30, 11:00 a.m. - 6:00 p.m.
2025
Jan 28-30